J. Garcia-Vidal, March, M., Cerdà-Alabern, L., Corbal, J., and Valero, M.,
“A DRAM/SRAM Memory Scheme for Fast Packet Buffers”,
IEEE Transactions on Computers, vol. 55, pp. 588–602, 2006.
J. Garcia-Vidal, March, M., Cerdà-Alabern, L., Corbal, J., and Valero, M.,
“On the Design of Hybrid DRAM/SRAM Memory Schemes for Fast Packet Buffers”, in
Proc. of the IEEE High Performance Switching and Routing (HPSR), Phoenix, Arizona, USA, 2004, pp. 15–19.
J. Garcia-Vidal, Corbal, J., Cerdà-Alabern, L., and Valero, M.,
“Design and Implementation of High-Performance Memory Systems for Future Packet Buffers”, in
Proc. of the 36th Annual International Symposium on Microarchitecture (MICRO'36), San Diego, California, USA, 2003, pp. 373–384.
S. Gheorghiu, Lopez, A., and Rodriguez, P.,
“Multipath TCP with Network Coding for Wireless Mesh Networks”, in
IEEE International Conference on Communications (ICC'2010), Cape Town, South Africa, 2010.